Most of the defines are directly derived from the user manual of the LPC17xx or the PHY interface datasheet. More...

Data Structures
struct	rflpc_eth_descriptor_t
	This structure holds a descriptor which describes the fragment received or sent by the ethernet DMA. More...

struct	rflpc_eth_rx_status_t
	This structure holds the reception status associated to a descriptor. More...

struct	rflpc_eth_tx_status_t
	This structure holds the transmit status associated to a descriptor. More...

Macros
#define	RFLPC_ETH_PCENET_BIT (1 << 30)
	Bit to set to activate ethernet in PCONP register.

#define	RFLPC_ETH_MAX_FRAME_LENGTH 1538
	Maximum size of an ethernet frame Consist of: More...

#define	RFLPC_ETH_MAX_CLOCK 2500000
	Maximum allowed clock frequency for MII, defined by IEEE 802.3, see p. More...

#define	TX_PRODUCE_INDEX_INC(inc) ((LPC_EMAC->TxProduceIndex + (inc))% (LPC_EMAC->TxDescriptorNumber+1))
	Helper macro for rflpc_eth_get_current_tx_packet_descriptor.

Functions
int	rflpc_eth_init ()
	Inits the ethernet device.

int	rflpc_eth_link_state ()
	Returns the link state. More...

void	rflpc_eth_set_link_mode (int mode)
	Forces the MAC and PHY devices to operate on the given mode no matter the capability of the linked partner. More...

int	rflpc_eth_link_auto_negociate (int max_desired_mode)
	Force the physical link to perform auto negociation of mode. More...

int	rflpc_eth_get_link_mode ()
	returns the current link mode. More...

static uint32_t	rflpc_eth_get_packet_size (uint32_t status_info)
	Returns the size of a packet from the status_info field of a rflpc_eth_tx_status_t or rflpc_eth_rx_status_t. More...

static void	rflpc_eth_set_tx_control_word (uint32_t size_to_send, volatile uint32_t *control, int trigger_it, int last_fragment)
	Sets the transmission control word of a rflpc_eth_descriptor_t struct. More...

void	rflpc_eth_set_rx_base_addresses (rflpc_eth_descriptor_t descriptors, rflpc_eth_rx_status_t status, int count)
	Sets rx descriptors and status base address. More...

static int	rflpc_eth_get_current_rx_packet_descriptor (rflpc_eth_descriptor_t descriptor, rflpc_eth_rx_status_t status)
	Returns the pointers on the current rx packet descriptor. More...

static int	rflpc_eth_rx_available ()
	Returns true if a packet has been received and not yet processed available. More...

static void	rflpc_eth_done_process_rx_packet ()
	This function has to be called when a packet (which descriptor is returned by rflpc_eth_get_current_rx_packet_descriptor) has been processed and can be discarded.

void	rflpc_eth_set_tx_base_addresses (rflpc_eth_descriptor_t descriptos, rflpc_eth_tx_status_t status, int count)
	Sets tx descriptors and status base address. More...

static int	rflpc_eth_get_current_tx_packet_descriptor (rflpc_eth_descriptor_t descriptor, rflpc_eth_tx_status_t status, int idx)
	returns the index of the current tx packet descriptor. More...

static int	rflpc_eth_get_last_sent_packet_idx ()
	Returns the index of the last send buffer. More...

static void	rflpc_eth_done_process_tx_packet (int count)
	When the packet has been generated, calling this function will make it owned by the hardware and queued for emission. More...

void	rflpc_eth_get_mac_address (uint8_t *addr)
	returns the device MAC address

void	rflpc_eth_set_mac_address (const uint8_t *addr)
	sets the device MAC address

static void	rflpc_eth_set_irq_handler (rflpc_irq_handler_t c)
	sets the interrupt handler of the ethernet peripheral

static void	rflpc_eth_irq_enable (uint32_t irqs)
	enable eth interrupts More...

static void	rflpc_eth_irq_disable (uint32_t irqs)
	disable eth interrupts This function will remove irq enable bits. More...

static void	rflpc_eth_irq_enable_set (uint32_t irqs)
	sets the irq enable register This function will disable all irqs and then only enable those given. More...

static void	rflpc_eth_irq_clear (uint32_t irqs)
	clear given pending interrupts

static uint32_t	rflpc_eth_irq_get_status ()
	gets the interrupt status. More...

static void	rflpc_eth_irq_trigger (uint32_t irqs)
	Force the generation of the given interrupt. More...

static void	rflpc_eth_activate_rx_filter (int accept_unicast, int accept_multicast, int accept_broadcast)
	Activate the hardware receive filter. More...

static void	rflpc_eth_deactivate_rx_filter ()
	Deactivates the hardware receive filter. More...

void	rflpc_eth_dump_internals ()
	Use the printf function to dump the values of the MAC registers. More...

Ethernet pin configuration
This allows the configuration of the pins of the LPC17xx to use the ethernet device. This values are for LPC17xx devices.
#define	RFLPC_ETH_PIN_TXD0 RFLPC_PIN_P1_0
	Transmit data bit 0.

#define	RFLPC_ETH_PIN_TXD1 RFLPC_PIN_P1_1
	Transmit data bit 1.

#define	RFLPC_ETH_PIN_TX_EN RFLPC_PIN_P1_4
	Transmit data enable pin.

#define	RFLPC_ETH_PIN_CRS RFLPC_PIN_P1_8
	Carrier sense Pin.

#define	RFLPC_ETH_PIN_RXD0 RFLPC_PIN_P1_9
	Receive data bit 0.

#define	RFLPC_ETH_PIN_RXD1 RFLPC_PIN_P1_10
	Receive data bit 1.

#define	RFLPC_ETH_PIN_RX_ER RFLPC_PIN_P1_14
	Receive error.

#define	RFLPC_ETH_PIN_REF_CLK RFLPC_PIN_P1_15
	Reference clock.

#define	RFLPC_ETH_PIN_MDC RFLPC_PIN_P1_16
	MIIM Clock pin.

#define	RFLPC_ETH_PIN_MDIO RFLPC_PIN_P1_17
	MI data input and output pin.

MAC Configuration register bits
#define	RFLPC_ETH_MAC1_RECEIVE_ENABLE (1 << 0)
	Enable reception.

#define	RFLPC_ETH_MAC1_PASS_ALL_FRAMES (1 << 1)
	Pass all frames to driver.

#define	RFLPC_ETH_MAC1_RX_FLOW_CONTROL (1 << 2)
	Activate receive path flow control.

#define	RFLPC_ETH_MAC1_TX_FLOW_CONTROL (1 << 3)
	Activate transmit path flow control.

#define	RFLPC_ETH_MAC1_LOOPBACK (1 << 4)
	Activate interface loopback (for testing purpose mainly.

#define	RFLPC_ETH_MAC1_RESET_TX (1 << 8)
	Reset tranmit path.

#define	RFLPC_ETH_MAC1_RESET_MCS_TX (1 << 9)
	Reset Transmit MAC Sublayer control logic.

#define	RFLPC_ETH_MAC1_RESET_RX (1 << 10)
	Reset receive path.

#define	RFLPC_ETH_MAC1_RESET_MCS_RX (1 << 11)
	Reset receive MAC Sublayer control logic.

#define	RFLPC_ETH_MAC1_SIM_RESET (1 << 14)
	Reset the random number generator in the transmit function.

#define	RFLPC_ETH_MAC1_SOFT_RESET (1 << 15)
	Reset the MAC device.

#define	RFLPC_ETH_MAC2_FULL_DUPLEX (1 << 0)
	Duplex mode selection.

#define	RFLPC_ETH_MAC2_FRAME_LENGTH_CHK (1 << 1)
	Check lenght of received and transmited frames and report in status info.

#define	RFLPC_ETH_MAC2_HUGE_FRAME_ENABLE (1 << 2)
	Activate jumbo frames.

#define	RFLPC_ETH_MAC2_DELAYED_CRC (1 << 3)
	Wait some bytes before begining CRC calculation (if proprietary bytes are sent before 802.3 header.

#define	RFLPC_ETH_MAC2_CRC_ENABLE (1 << 4)
	Add CRC to every frames.

#define	RFLPC_ETH_MAC2_PAD_CRC_ENABLE (1 << 5)
	Activate CRC and/or Padding.

#define	RFLPC_ETH_MAC2_VLAN_PAD_ENABLE (1 << 6)
	Activate padding when sending frame smaller that 64 bytes.

#define	RFLPC_ETH_MAC2_AUTO_DETECT_PAD_ENABLE (1 << 7)
	Auto detect padded frames.

#define	RFLPC_ETH_MAC2_PURE_PREAMBLE_ENFORCE (1 << 8)
	Force verification of preamble.

#define	RFLPC_ETH_MAC2_LONG_PREAMBLE_ENFORCE (1 << 9)
	Force the use of long preamble.

#define	RFLPC_ETH_MAC2_NO_BACKOFF (1 << 12)
	Disable backoff after a collision occur.

#define	RFLPC_ETH_MAC2_BACK_PRESSURE (1 << 13)
	Disable backoff after a collision occur during back pressure.

#define	RFLPC_ETH_MAC2_EXCESS_DEFER (1 << 14)
	When enabled (set to ’1’) the MAC will defer to carrier indefinitely as per the Standard. More...

MAC Control register bits
#define	RFLPC_ETH_CMD_RX_ENABLE (1 << 0)

#define	RFLPC_ETH_CMD_TX_ENABLE (1 << 1)

#define	RFLPC_ETH_CMD_REG_RESET (1 << 3)

#define	RFLPC_ETH_CMD_TX_RESET (1 << 4)

#define	RFLPC_ETH_CMD_RX_RESET (1 << 5)

#define	RFLPC_ETH_CMD_PASS_RUNT_FRAMES (1 << 6)

#define	RFLPC_ETH_CMD_PASS_RX_FILTER (1 << 7)

#define	RFLPC_ETH_CMD_TX_FLOW_CONTROL (1 << 8)

#define	RFLPC_ETH_CMD_RMII (1 << 9)

#define	RFLPC_ETH_CMD_FULL_DUPLEX (1 << 10)

MAC Filtering register bits (p. 166)
#define	RFLPC_ETH_RXFILTER_UNICAST_EN (1 << 0)

#define	RFLPC_ETH_RXFILTER_BROADCAST_EN (1 << 1)

#define	RFLPC_ETH_RXFILTER_MULTICAST_EN (1 << 2)

#define	RFLPC_ETH_RXFILTER_UNICAST_HASH_EN (1 << 3)

#define	RFLPC_ETH_RXFILTER_MULTICAST_HASH_EN (1 << 4)

#define	RFLPC_ETH_RXFILTER_PERFECT_EN (1 << 5)

#define	RFLPC_ETH_RXFILTER_MAGIC_WOL_EN (1 << 12)

#define	RFLPC_ETH_RXFILTER_RXFILTER_WOL_EN (1 << 13)

MIND control register
#define	RFLPC_ETH_MIND_BUSY (1)

#define	RFLPC_ETH_MIND_SCANNING (1 << 1)

#define	RFLPC_ETH_MIND_NOT_VALID (1 << 2)

#define	RFLPC_ETH_MIND_MII_LINK_FAIL (1 << 3)

RMII Support register
#define	RFLPC_ETH_SUPP_10MBPS (0)

#define	RFLPC_ETH_SUPP_100MBPS (1 << 8)

MII control register bits
#define	RFLPC_ETH_MCFG_SCAN_INCREMENT (1 << 0)

#define	RFLPC_ETH_MCFG_SUPPRESS_PREAMBLE (1 << 1)

#define	RFLPC_ETH_MCFG_RESET_MIIM (1 << 15)

PHY Registers
#define	RFLPC_ETH_PHY_BMCR (0x0)

#define	RFLPC_ETH_PHY_BMSR (0x1)

#define	RFLPC_ETH_PHY_PHYIDR1 (0x2)

#define	RFLPC_ETH_PHY_PHYIDR2 (0x3)

#define	RFLPC_ETH_PHY_ANAR (0x4)

#define	RFLPC_ETH_PHY_ANLPAR (0x5)

#define	RFLPC_ETH_PHY_ANLPARNP (0x5) /* Not a bug, it IS the same addr (p. 36 of the DP83848J datasheet */

#define	RFLPC_ETH_PHY_ANER (0x6)

#define	RFLPC_ETH_PHY_ANNPTR (0x7)

#define	RFLPC_ETH_PHY_PHYSTS (0x10)

#define	RFLPC_ETH_PHY_FCSCR (0x14)

#define	RFLPC_ETH_PHY_RECR (0x15)

#define	RFLPC_ETH_PHY_PCSR (0x16)

#define	RFLPC_ETH_PHY_RBR (0x17)

#define	RFLPC_ETH_PHY_LEDCR (0x18)

#define	RFLPC_ETH_PHY_PHYCR (0x19)

#define	RFLPC_ETH_PHY_10BTSCR (0x1A)

#define	RFLPC_ETH_PHY_CDCTRL1 (0x1B)

#define	RFLPC_ETH_PHY_EDCR (0x1D)

Basic Mode Control Register (BMSR) bits
#define	RFLPC_ETH_BMCR_RESET (1 << 15)

#define	RFLPC_ETH_BMCR_LOOPBACK (1 << 14)

#define	RFLPC_ETH_BMCR_SPEED_SELECT (1 << 13)

#define	RFLPC_ETH_BMCR_ENABLE_AUTO_NEG (1 << 12)

#define	RFLPC_ETH_BMCR_POWER_DOWN (1 << 11)

#define	RFLPC_ETH_BMCR_ISOLATE (1 << 10)

#define	RFLPC_ETH_BMCR_RESTART_AUTO_NEG (1 << 9)

#define	RFLPC_ETH_BMCR_DUPLEX_MODE (1 << 8)

#define	RFLPC_ETH_BMCR_COLLISION_TEST (1 << 7)

Basic Mode Status Register (BMSR) bits
#define	RFLPC_ETH_BMSR_100BASET4 (1 << 15)

#define	RFLPC_ETH_BMSR_100BASETX_FULL (1 << 14)

#define	RFLPC_ETH_BMSR_100BASETX_HALF (1 << 13)

#define	RFLPC_ETH_BMSR_10BASET_FULL (1 << 12)

#define	RFLPC_ETH_BMSR_10BASET_HALF (1 << 11)

#define	RFLPC_ETH_BMSR_MF_PREAMBLE_SUPPRESSION (1 << 6)

#define	RFLPC_ETH_BMSR_AUTO_NEG_COMPLETE (1 << 5)

#define	RFLPC_ETH_BMSR_REMOTE_FAULT (1 << 4)

#define	RFLPC_ETH_BMSR_CAN_AUTO_NEG (1 << 3)

#define	RFLPC_ETH_BMSR_LINK_STATUS (1 << 2)

#define	RFLPC_ETH_BMSR_JABBER_DETECT (1 << 1)

#define	RFLPC_ETH_BMSR_EXT_REGISTER_CAPS (1 << 0)

Auto negotiation advertisement register (ANAR) bits
#define	RFLPC_ETH_ANAR_ASM_DIR (1 << 11)

#define	RFLPC_ETH_ANAR_PAUSE (1 << 10)

#define	RFLPC_ETH_ANAR_T4 (1 << 9)

#define	RFLPC_ETH_ANAR_TX_FD (1 << 8)

#define	RFLPC_ETH_ANAR_TX (1 << 7)

#define	RFLPC_ETH_ANAR_10_FD (1 << 6)

#define	RFLPC_ETH_ANAR_10 (1 << 5)

PHY status register (PHYSTS) bits
#define	RFLPC_ETH_PHYSTS_MDI_X (1 << 14)

#define	RFLPC_ETH_PHYSTS_RX_ERROR_LATCH (1 << 13)

#define	RFLPC_ETH_PHYSTS_POLARITY_STATUS (1 << 12)

#define	RFLPC_ETH_PHYSTS_FALSE_CARRIER_SENSE_LATCH (1 << 11)

#define	RFLPC_ETH_PHYSTS_SIGNAL_DETECT (1 << 10)

#define	RFLPC_ETH_PHYSTS_DESCRAMBLER_LOCK (1 << 9)

#define	RFLPC_ETH_PHYSTS_PAGE_RECEIVED (1 << 8)

#define	RFLPC_ETH_PHYSTS_REMOTE_FAULT (1 << 6)

#define	RFLPC_ETH_PHYSTS_JABBER_DETECT (1 << 5)

#define	RFLPC_ETH_PHYSTS_AUTO_NEG_COMPLETE (1 << 4)

#define	RFLPC_ETH_PHYSTS_LOOPBACK_STATUS (1 << 3)

#define	RFLPC_ETH_PHYSTS_DUPLEX_STATUS (1 << 2)

#define	RFLPC_ETH_PHYSTS_SPEED_STATUS (1 << 1)

#define	RFLPC_ETH_PHYSTS_LINK_STATUS (1 << 0)

Interrupt bits
#define	RFLPC_ETH_IRQ_EN_RX_OVERRUN (1 << 0)

#define	RFLPC_ETH_IRQ_EN_RX_ERROR (1 << 1)

#define	RFLPC_ETH_IRQ_EN_RX_FINISHED (1 << 2)

#define	RFLPC_ETH_IRQ_EN_RX_DONE (1 << 3)

#define	RFLPC_ETH_IRQ_EN_TX_UNDERRUN (1 << 4)

#define	RFLPC_ETH_IRQ_EN_TX_ERROR (1 << 5)

#define	RFLPC_ETH_IRQ_EN_TX_FINISHED (1 << 6)

#define	RFLPC_ETH_IRQ_EN_TX_DONE (1 << 7)

#define	RFLPC_ETH_IRQ_EN_SOFT (1 << 12)

#define	RFLPC_ETH_IRQ_EN_WAKE_UP (1 << 13)

Link modes
These constants can be used to get or set the link mode using rflpc_eth_get_link_mode and rflpc_eth_set_link_mode.
#define	RFLPC_ETH_LINK_MODE_SPEED_BIT (1 << 0)
	This bit indicates 100Mbps/10Mbps speed.

#define	RFLPC_ETH_LINK_MODE_DUPLEX_BIT (1 << 1)
	This bit indicates Full/Half duplex mode.

#define	RFLPC_ETH_LINK_MODE_100HD (RFLPC_ETH_LINK_MODE_SPEED_BIT)
	100Mbps, Half Duplex

#define	RFLPC_ETH_LINK_MODE_10HD (0)
	10Mbps, Half Duplex

#define	RFLPC_ETH_LINK_MODE_100FD (RFLPC_ETH_LINK_MODE_SPEED_BIT \| RFLPC_ETH_LINK_MODE_DUPLEX_BIT)
	100Mbps, Full Duplex

#define	RFLPC_ETH_LINK_MODE_10FD (RFLPC_ETH_LINK_MODE_DUPLEX_BIT)
	10Mbps, Full Duplex

Detailed Description

Most of the defines are directly derived from the user manual of the LPC17xx or the PHY interface datasheet.

Please refer to these documentation for further information

Macro Definition Documentation

#define RFLPC_ETH_MAC2_EXCESS_DEFER (1 << 14)

When enabled (set to ’1’) the MAC will defer to carrier indefinitely as per the Standard.

When disabled, the MAC will abort when the excessive deferral limit is reached.

Definition at line 127 of file eth_const.h.

#define RFLPC_ETH_MAX_CLOCK 2500000

Maximum allowed clock frequency for MII, defined by IEEE 802.3, see p.

154 of the user manual

Definition at line 201 of file eth_const.h.

#define RFLPC_ETH_MAX_FRAME_LENGTH 1538

Maximum size of an ethernet frame Consist of:

1500 bytes for payload
8 bytes for preamble/sfd
12 bytes for src and dst address
2 bytes for length/type
4 bytes for CRC
12 bytes for minimum interframe gap

Definition at line 199 of file eth_const.h.

Function Documentation

static void rflpc_eth_activate_rx_filter	(	int	accept_unicast,
		int	accept_multicast,
		int	accept_broadcast
	)

inlinestatic

Activate the hardware receive filter.

When activated, the hardware will discard all packet whose destination address are not for the device (MAC address filter).

Parameters

accept_unicast	If true, accept ALL unicast frames
accept_multicast	If true, also accept multicast frames
accept_broadcast	If true, also accept broadcast frames

Definition at line 403 of file ethernet.h.

static void rflpc_eth_deactivate_rx_filter ( )

inlinestatic

Deactivates the hardware receive filter.

All received frames will now be received by the driver.

Definition at line 420 of file ethernet.h.

static void rflpc_eth_done_process_tx_packet ( int count )

inlinestatic

When the packet has been generated, calling this function will make it owned by the hardware and queued for emission.

Parameters

[in] count The number of descriptors to hand to the hardware

Definition at line 309 of file ethernet.h.

References TX_PRODUCE_INDEX_INC.

void rflpc_eth_dump_internals ( )

Use the printf function to dump the values of the MAC registers.

Returns: void

static int rflpc_eth_get_current_rx_packet_descriptor	(	rflpc_eth_descriptor_t **	descriptor,
		rflpc_eth_rx_status_t **	status
	)

inlinestatic

Returns the pointers on the current rx packet descriptor.

The returned descriptor is the one of the last received packet that has not been marked as processed by rflpc_eth_done_process_rx_packet();

Returns: 0 if receive queue is empty, 1 if pointers are valid

Definition at line 217 of file ethernet.h.

static int rflpc_eth_get_current_tx_packet_descriptor	(	rflpc_eth_descriptor_t **	descriptor,
		rflpc_eth_tx_status_t **	status,
		int	idx
	)

inlinestatic

returns the index of the current tx packet descriptor.

Parameters

[out]	descriptor	a pointer to a pointer of rflpc_eth_descriptor_t
[out]	status	a pointer to a pointer of rflpc_eth_tx_status_t
[in]	idx	the descriptor to get. 0 is the first free, 1 the second free...

The return descriptor is the one that is prepared by software before sending it. When rflpc_eth_done_process_tx_packet() is called, the packet will be owned by the hardware and sent as soon as possible.

Returns: 0 if no more descriptor are available (which means that all the buffers are owned by the hardware and waiting to be sent). 1 if pointers are valid

Definition at line 279 of file ethernet.h.

References TX_PRODUCE_INDEX_INC.

static int rflpc_eth_get_last_sent_packet_idx ( )

inlinestatic

Returns the index of the last send buffer.

Returns: int

Definition at line 297 of file ethernet.h.

int rflpc_eth_get_link_mode ( )

returns the current link mode.

The information is extracted from the PHY PHYSTS register if RFLPC_ETH_USE_EXTENDED_MII is defined. Otherwise, it uses the Control register which is less reliable and may return wrong mode (especially for the duplex mode)

Returns: bit 0 tells speed, bit 1 tells duplex

static uint32_t rflpc_eth_get_packet_size ( uint32_t status_info )

inlinestatic

Returns the size of a packet from the status_info field of a rflpc_eth_tx_status_t or rflpc_eth_rx_status_t.

Parameters

[in] status_info The corresponding field in rflpc_eth_tx_status_t or rflpc_eth_tx_status_t

Returns: The size of the corresponding buffer

Definition at line 183 of file ethernet.h.

static void rflpc_eth_irq_disable ( uint32_t irqs )

inlinestatic

disable eth interrupts This function will remove irq enable bits.

Parameters

irqs	a bitwise ORed combination of RFLPC_ETH_IRQ_EN_* bits

Definition at line 352 of file ethernet.h.

static void rflpc_eth_irq_enable ( uint32_t irqs )

inlinestatic

enable eth interrupts

This function will ADD new irq enable, not set all enable irqs to the ones given.

Parameters

irqs	a bitwise ORed combination of RFLPC_ETH_IRQ_EN_* bits

Definition at line 342 of file ethernet.h.

static void rflpc_eth_irq_enable_set ( uint32_t irqs )

inlinestatic

sets the irq enable register This function will disable all irqs and then only enable those given.

Parameters

irqs	a bitwise ORed combination of RFLPC_ETH_IRQ_EN_* bits

Definition at line 362 of file ethernet.h.

static uint32_t rflpc_eth_irq_get_status ( )

inlinestatic

gets the interrupt status.

Returns: a bitwise ORed of eth pending interrupt bits

Definition at line 376 of file ethernet.h.

static void rflpc_eth_irq_trigger ( uint32_t irqs )

inlinestatic

Force the generation of the given interrupt.

This can be used for triggering an interrupt by software

Parameters

irqs	a bitwise ORed combination of RFLPC_ETH_IRQ_EN_* bits

Returns: void

Definition at line 388 of file ethernet.h.

int rflpc_eth_link_auto_negociate ( int max_desired_mode )

Force the physical link to perform auto negociation of mode.

This function will start autonegociation, wait for it to finish and reconfigure MAC/PHY if needed (100Mbps/10Mbps, half duplex/full duplex...)

Parameters

max_desired_mode bit 0 tells speed, bit 1 tells duplex

Returns: 0 if auto-negociation performed successfully. -1 otherwise. If the link is down when calling this function, -1 will be returned immediatly.

Warning: This function is blocking and wait for the autonegociation to be complete.

int rflpc_eth_link_state ( )

Returns the link state.

Returns: true if link is up, false if link is down

static int rflpc_eth_rx_available ( )

inlinestatic

Returns true if a packet has been received and not yet processed available.

Returns: true if a packet is available

Definition at line 232 of file ethernet.h.

void rflpc_eth_set_link_mode ( int mode )

Forces the MAC and PHY devices to operate on the given mode no matter the capability of the linked partner.

Warning: According to PHY datasheet, when forcing the device to use full-duplex without using auto-negociation the partner would not be able to detect full-duplex and thus will use half-duplex. So it is always better to use autonegociation. Verify which parameter is effectively set with rflpc_eth_get_link_mode

void rflpc_eth_set_rx_base_addresses	(	rflpc_eth_descriptor_t *	descriptors,
		rflpc_eth_rx_status_t *	status,
		int	count
	)

Sets rx descriptors and status base address.

Warning: descriptors must be aligned on a word boundary. status must be aligned on a double word boundaryx

void rflpc_eth_set_tx_base_addresses	(	rflpc_eth_descriptor_t *	descriptos,
		rflpc_eth_tx_status_t *	status,
		int	count
	)

Sets tx descriptors and status base address.

Warning: descriptors and status must be aligned on a word boundary.

static void rflpc_eth_set_tx_control_word	(	uint32_t	size_to_send,
		volatile uint32_t *	control,
		int	trigger_it,
		int	last_fragment
	)

inlinestatic

Sets the transmission control word of a rflpc_eth_descriptor_t struct.

Note: This function is only a small helper. It will set the last frame bit. If you want more control, DIY :)

Parameters

[in]	size_to_send	Size of the buffer to send
[out]	control	Pointer to the control word to send
[in]	trigger_it	Should the transmission of this buffer produce an interrupt
[in]	last_fragment	Is this fragment the last of the frame

Definition at line 196 of file ethernet.h.

Data Structures

Macros

Functions

Ethernet pin configuration

MAC Configuration register bits

MAC Control register bits

MAC Filtering register bits (p. 166)

MIND control register

RMII Support register

MII control register bits

PHY Registers

Basic Mode Control Register (BMSR) bits

Basic Mode Status Register (BMSR) bits

Auto negotiation advertisement register (ANAR) bits

PHY status register (PHYSTS) bits

Interrupt bits

Link modes

Detailed Description

Macro Definition Documentation

Function Documentation