rfLPC
A low level library for using NXP's LPC17xx SoC. Config is given for MBED prototyping board

Macros

#define RFLPC_SPI_CPOL_RISING_EDGE   0
 Configure SCL to generate a rising edge clock. More...
 
#define RFLPC_SPI_CPOL_FALLING_EDGE   2
 Configure SCL to generate a falling edge clock. More...
 
#define RFLPC_SPI_CPHA_PHASE_PIOR_TO_FIRST_EDGE   0
 Transmit data before first clock edge. More...
 
#define RFLPC_SPI_CPHA_PHASE_FIRST_EDGE   1
 Transmit data at first clock edge. More...
 

Enumerations

enum  rflpc_spi_t {
  RFLPC_SPI0,
  RFLPC_SPI1
}
 Used to select which SPI port to use. More...
 
enum  rflpc_spi_mode_t {
  RFLPC_SPI_MASTER,
  RFLPC_SPI_SLAVE
}
 Used to select the SPI operating mode. More...
 

Functions

void rflpc_spi_init (rflpc_spi_t port, rflpc_spi_mode_t mode, rflpc_clock_divider_t cpu_clock_divider, uint8_t data_size_transfert, uint8_t clock_prescale, uint8_t serial_clock_rate, uint8_t clock_polarity_phase)
 Inits the SPI interface in master mode. More...
 
static LPC_SSP_TypeDef * rflpc_spi_get_base_addr (rflpc_spi_t port)
 Returns the base address of the SPI control block depending of the desired port. More...
 
static int rflpc_spi_tx_fifo_empty (rflpc_spi_t port)
 Tests if transmition FIFO is empty. More...
 
static int rflpc_spi_idle (rflpc_spi_t port)
 Test if the spi is idle (nor transmiting neither receiving) This is useful when you need to handle CS by hand. More...
 
static int rflpc_spi_tx_fifo_full (rflpc_spi_t port)
 Tests if the transmition FIFO is full. More...
 
static int rflpc_spi_rx_fifo_empty (rflpc_spi_t port)
 Tests if the reception FIFO is empty. More...
 
static void rflpc_spi_write (rflpc_spi_t port, uint16_t data)
 Sends data through the spi interface. More...
 
static uint16_t rflpc_spi_read (rflpc_spi_t port)
 Receive data through the spi interface. More...
 
void rflpc_spi_set_rx_callback (rflpc_spi_t port, rflpc_irq_handler_t callback)
 Sets the interrupt handler for SPI reception. More...
 

Detailed Description

Macro Definition Documentation

#define RFLPC_SPI_CPHA_PHASE_FIRST_EDGE   1

Transmit data at first clock edge.

See also
: rflpc_spi_init

Definition at line 60 of file spi.h.

#define RFLPC_SPI_CPHA_PHASE_PIOR_TO_FIRST_EDGE   0

Transmit data before first clock edge.

See also
: rflpc_spi_init

Definition at line 57 of file spi.h.

#define RFLPC_SPI_CPOL_FALLING_EDGE   2

Configure SCL to generate a falling edge clock.

See also
: rflpc_spi_init

Definition at line 54 of file spi.h.

#define RFLPC_SPI_CPOL_RISING_EDGE   0

Configure SCL to generate a rising edge clock.

See also
: rflpc_spi_init

Definition at line 52 of file spi.h.

Enumeration Type Documentation

Used to select the SPI operating mode.

Enumerator
RFLPC_SPI_MASTER 

Use the SPI as master.

RFLPC_SPI_SLAVE 

Use the SPI as slave.

Definition at line 45 of file spi.h.

Used to select which SPI port to use.

Enumerator
RFLPC_SPI0 

Use the SPI port 0.

RFLPC_SPI1 

Use the SPI port 1.

Definition at line 38 of file spi.h.

Function Documentation

static LPC_SSP_TypeDef* rflpc_spi_get_base_addr ( rflpc_spi_t  port)
inlinestatic

Returns the base address of the SPI control block depending of the desired port.

Parameters
portthe port to get
Returns
pointer to a LPC_SSP_TypeDef structure that can be used to configure the desired SPI.
Note
Used by the library internals. You should not need to use this function.

Definition at line 86 of file spi.h.

References RFLPC_SPI0.

Referenced by rflpc_spi_idle(), rflpc_spi_read(), rflpc_spi_rx_fifo_empty(), rflpc_spi_tx_fifo_empty(), rflpc_spi_tx_fifo_full(), and rflpc_spi_write().

static int rflpc_spi_idle ( rflpc_spi_t  port)
inlinestatic

Test if the spi is idle (nor transmiting neither receiving) This is useful when you need to handle CS by hand.

Parameters
portThe SPI port to test
Returns
true if the spi port is idle

Definition at line 109 of file spi.h.

References rflpc_spi_get_base_addr().

void rflpc_spi_init ( rflpc_spi_t  port,
rflpc_spi_mode_t  mode,
rflpc_clock_divider_t  cpu_clock_divider,
uint8_t  data_size_transfert,
uint8_t  clock_prescale,
uint8_t  serial_clock_rate,
uint8_t  clock_polarity_phase 
)

Inits the SPI interface in master mode.

Parameters
portThe port to configure
modeThe mode to use
cpu_clock_dividerThe divider applied to CPU clock to get the SPI peripheral clock
data_size_transfertthe number of bits that are transfered in each frame (only values between 4 and 16bits are supported)
clock_prescaleFactor by which the prescaler divide the peripheral clock. Between 2 and 254. Bit 0 is always read as 0 (only even numbers). Used only for master mode
serial_clock_rateNumber of prescaler-outputs ber bit. This allows to set the SPI tranfert clock. Used only for master mode.
clock_polarity_phaseClock polarity and phase. polarity is bit 1, phase is bit 0. Other bits are ignored. Can be constructed as a ORed combination of RFLPC_SPI_CPOL_* and RFLPC_SPI_CPHA_* values
Note
The final clock used as SCK is then

\[\frac{CPU Clock}{CPUDivider \times ClockPrescale \times SerialClockRate}\]

In slave mode, the clock_prescale and serial_clock_rate parameters are not used. The clock sent by the master must not exceed 1/12 of the frequency used to clock the SPI peripheral
See also
rflpc_clock_get_system_clock()
static uint16_t rflpc_spi_read ( rflpc_spi_t  port)
inlinestatic

Receive data through the spi interface.

Parameters
portthe port to receive from
Returns
the value read on the spi bus
Warning
this function waits for a data to be available!

Definition at line 159 of file spi.h.

References rflpc_spi_get_base_addr(), and rflpc_spi_rx_fifo_empty().

static int rflpc_spi_rx_fifo_empty ( rflpc_spi_t  port)
inlinestatic

Tests if the reception FIFO is empty.

Parameters
portThe SPI port to test
Returns
true if empty

Definition at line 134 of file spi.h.

References rflpc_spi_get_base_addr().

Referenced by rflpc_spi_read().

void rflpc_spi_set_rx_callback ( rflpc_spi_t  port,
rflpc_irq_handler_t  callback 
)

Sets the interrupt handler for SPI reception.

The interrupt will be generated when the RX FIFO is half-full

Parameters
portthe port to use
callbackthe callback to set
static int rflpc_spi_tx_fifo_empty ( rflpc_spi_t  port)
inlinestatic

Tests if transmition FIFO is empty.

Parameters
portThe SPI port to test
Returns
true if empty

Definition at line 97 of file spi.h.

References rflpc_spi_get_base_addr().

static int rflpc_spi_tx_fifo_full ( rflpc_spi_t  port)
inlinestatic

Tests if the transmition FIFO is full.

Parameters
portThe SPI port to test
Returns
true if full

Definition at line 122 of file spi.h.

References rflpc_spi_get_base_addr().

Referenced by rflpc_spi_write().

static void rflpc_spi_write ( rflpc_spi_t  port,
uint16_t  data 
)
inlinestatic

Sends data through the spi interface.

Parameters
portThe port to send to
dataThe data to send. If the port has been configured to send less than 16 bits in each frame, the data must be right justified
Note
If the port is configured master, the slave select pin will be activated as long as there is data in the FIFO. If the port is configured slave, the data will be transmitted only when the slave select is activated by master

Definition at line 147 of file spi.h.

References rflpc_spi_get_base_addr(), and rflpc_spi_tx_fifo_full().